Recovering the STM32L4R5

We discovered an SWD configuration error was present in older versions of the ST Board Support Package (BSP) for the Arduino IDE. The configuration error would occasionally cause corruption of the Option Bytes in the FLASH registers. Below we outline the steps required to repair the Option Bytes of the Swan.

Hardware Setup

1. Connect the STLink Debugger to the Swan with the included ribbon cable and your computer via USB
2. Apply power to the Swan via the micro USB port and plug into your computer (or other USB power source)

Update with STM32CubeProgrammer (GUI)

Invalid FLASH Registers

When the Option Byte registers get into this state, the STM32L4R5 will no longer execute firmware or allow programming.

Fortunately, the STM32L4R5 can be recovered using the STM32CubeProgrammer, by updating the following FLASH registers (in the [REG] tab) to the following values:

Valid FLASH Registers

After updating the option bytes, the STM32L4R5 can now be programmed using the STM32CubeProgrammer and execute firmware. Once you have updated the ST BSP, the device can be debugged and programmed normally via SWD again.

Update with STM32_Programmer_CLI

1. Apply the following commands in order:

   Bash
   COPY

   STM32_Programmer_CLI --connect port=SWD --optionbytes RDP=0xBB
   STM32_Programmer_CLI --connect port=SWD --optionbytes RDP=0xAA
   STM32_Programmer_CLI --connect port=SWD --optionbytes nRST_STOP=1 IWDG_SW=1 IWDG_STOP=1 IWDG_STDBY=1 WWDG_SW=1 DBANK=1 nBOOT1=1 SRAM2_PE=1 SRAM2_RST=1 nSWBOOT0=01 PCROP1_STRT=0x1FFFF PCROP1_END=0x10000 WRP1A_STRT=0xFF WRP1A_END=0 WRP1B_STRT=0xFF WRP1B_END=0
   STM32_Programmer_CLI --connect port=SWD --optionbytes PCROP_RDP=1

2. Verify the option byte values by displaying them to the command prompt

   Bash
   COPY

   STM32_Programmer_CLI --connect port=SWD --optionbytes displ

3. Compare the response to the following...

   Text
   COPY

   UPLOADING OPTION BYTES DATA ...
   
     Bank          : 0x00
     Address       : 0x40022020
     Size          : 20 Bytes
   
   ██████████████████████████████████████████████████ 100%
   
     Bank          : 0x01
     Address       : 0x40022044
     Size          : 16 Bytes
   
   ██████████████████████████████████████████████████ 100%
   
   
   OPTION BYTES BANK: 0
   
      Read Out Protection:
   
        RDP          : 0xAA (Level 0, no protection)
   
      BOR Level:
   
        BOR_LEV      : 0x0 (BOR Level 0, reset level threshold is around 1.7 V)
   
      User Configuration:
   
        nRST_STOP    : 0x1 (No reset generated when entering Stop mode)
        nRST_STDBY   : 0x0 (Reset generated when entering Standby mode)
        nRST_SHDW    : 0x0 (Reset generated when entering the Shutdown mode)
        IWDG_SW      : 0x1 (Software independant watchdog)
        IWDG_STOP    : 0x1 (IWDG counter active in stop mode)
        IWDG_STDBY   : 0x1 (IWDG counter active in standby mode)
        WWDG_SW      : 0x1 (Software window watchdog)
        BFB2         : 0x0 (Dual-bank boot disable)
        DBANK        : 0x1 (Dual bank mode with 64 bits data)
        nBOOT1       : 0x1 (Boot from system memory when BOOT0=1)
        SRAM2_PE     : 0x1 (SRAM2 parity check disable)
        SRAM2_RST    : 0x1 (SRAM2 is not erased when a system reset occurs)
        nSWBOOT0     : 0x1 (BOOT0 taken from PH3/BOOT0 pin)
        nBOOT0       : 0x1 (BOOT0 = 0, boot from system memory when nSWBOOT0=1 and main flash is empty,otherwise, boot from main flash memory)
   
      PCROP Protection (Bank 1):
   
        PCROP1_STRT  : 0x1FFFF  (0x80FFFF8)
        PCROP1_END   : 0x10000  (0x8080000)
        PCROP_RDP    : 0x1 (PCROP zone is erased when RDP is decreased)
   
      Write Protection (Bank 1):
   
        WRP1A_STRT   : 0xFF  (0x80FF000)
        WRP1A_END    : 0x0  (0x8000000)
        WRP1B_STRT   : 0xFF  (0x80FF000)
        WRP1B_END    : 0x0  (0x8000000)
   
   OPTION BYTES BANK: 1
   
      PCROP Protection  (Bank 2):
   
        PCROP2_STRT  : 0x1FFFF  (0x81FFFF8)
        PCROP2_END   : 0x10000  (0x8180000)
   
      Write Protection (Bank 2):
   
        WRP2A_STRT   : 0xFF  (0x81FF000)
        WRP2A_END    : 0x0  (0x8100000)
        WRP2B_STRT   : 0xFF  (0x81FF000)
        WRP2B_END    : 0x0  (0x8100000)